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STM32L433CCT6

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STM32L433CCT6

STM32L433CCT6
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STM32L433CCT6 产品详情

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  • TS482IDT:TS482IDT
  • 品牌:ST/意法半导体
  • 封装形式:DIP
  • 类型:数字集成电路
  • 用途:军工
  • 功能:单片机
  • 导电类型:双极型
  • 封装外形:金属壳圆形型
  • 集成度:小规模(<50)
  • 型号:TS482IDT
  • 批号:TS482IDT
7.24.1.1 Internal RC oscillator
The Internal RC oscillator (IRC) may be used as the clock source for the watchdog timer,
and/or as the clock that drives the PLL and subsequently the CPU. The nominal IRC
frequency is 4 MHz. The IRC is trimmed to 1 % accuracy.
Upon power-up or any chip reset, the LPC2364/66/68 uses the IRC as the clock source.
Software may later switch to one of the other *ailable clock sources.
7.24.1.2 Main oscillator
The main oscillator can be used as the clock source for the CPU, with or without using the
PLL. The main oscillator operates at frequencies of 1 MHz to 24 MHz. This frequency can
be boosted to a higher frequency, up to the maximum CPU operating frequency, by the
PLL. The oscillator output is called OSCCLK. The clock selected as the PLL input is
PLLCLKIN, and the ARM processor clock frequency is referred to as CCLK elsewhere in
this document. The frequencies of PLLCLKIN and CCLK are the same value unless the
PLL is active and connected. Refer to Section 7.24.2 for additional information.
7.24.1.3 RTC oscillator
The RTC oscillator can be used as the clock source for the RTC and/or the watchdog
timer. Also, the RTC oscillator can be used to drive the PLL and the CPU.
7.24.2 PLL
The PLL accepts an input clock frequency in the range of 31 kHz to 50 MHz. The input
frequency i*ultiplied up to a high frequency, then divided dow*provide the actual
clock used by the CPU and the USB block.
The PLL input, in the range of 32 kHZ to 50 MHz, may initially be divided down by*alue
‘N’, which may be in the range of 1 to 256. This inpu*vision provides a wide range of
output frequencies from the same input frequency
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