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STM32F303C8T6 STM32F429ZIT6
第一枪帮您来“拼单”,更多低价等你来!STM32F303C8T6 STM32F429ZIT6
- 名称深圳市斯瑞特科技有限公司 【公司网站】
- 所在地中国 广东 深圳
- 联系人 朱小姐
- 价格 ¥6.3元/件 点此议价
- 采购量 不限制
- 发布日期 2020-06-12 14:11 至 长期有效
热线:13560767759
来电请说明在第一枪看到,谢谢!
STM32F303C8T6 STM32F429ZIT6产品详情
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- STM32F429ZIT6:STM32F429ZIT6
- 品牌:ST/意法半导体
- 封装形式:DIP
- 类型:数字集成电路
- 用途:军工
- 功能:单片机
- 导电类型:双极型
- 封装外形:金属壳圆形型
- 集成度:小规模(<50)
- 型号:STM32F429ZIT6
- 批号:2017+
7.18.1 Features
• <*n class="ft5">I*n>2<*n class="ft5">C0 is a standard I*n>2<*n class="ft5">C compliant bus interface with open-drain pins.*n>
• <*n class="ft5">I*n>2<*n class="ft5">C1 and I*n>2<*n class="ft5">C2 use standard I/O pins and do not support powering off of individual*n>
devices connected to the same bus lines
• <*n class="ft5">Easy to configure a*aster, sl*e, or master/sl*e.*n>
• <*n class="ft5">Programmable clocks allow versatile rate co*ol.*n>
• <*n class="ft5">Bidirectional data transfer between masters and sl*es.*n>
• <*n class="ft5">Multi-master bus (no ce*al master).*n>
• <*n class="ft5">Arbitration between simultaneously tran*itting masters without corruption of serial*n>
data on the bus.
• <*n class="ft5">Serial clock synchronization allows devices with different bit rates to communicate via*n>
one serial bus.
• <*n class="ft5">Serial clock synchronization can be used as a handshake mechani* to suspend and*n>
resume serial transfer.
• <*n class="ft5">The I*n>2<*n class="ft5">C-bus can be used for test and diagnostic pur*es.*n>
7.19 I2S-bus serial I/O co*ollers
The I2<*n class="ft5">S-bus provides a standard communication interface for digital audio applicati*.*n>
The I2<*n class="ft5">S-bus specification defines a 3-wire serial bus using one data line, one clock line,*n>
and one wo*elect signal. The basic I2<*n class="ft5">S connection has one master, which is always the*n>
master, and one sl*e. The I2<*n class="ft5">S interface on the LPC2364/66/68 provides a separate*n>
tran*it and receive channel, each of which can operate as either a master or a sl*e.
7.19.1 Features
• <*n class="ft5">The interface has separate input output channels each of which can operate in master*n>
or sl*e mode.
• <*n class="ft5">Capable of handling 8-bit, 16-bit, and 32-bit wo*izes.*n>
• <*n class="ft5">Mono and stereo audio data supported.*n>
• <*n class="ft5">The sampling frequency can range from 16 kHz to 48 kHz (16, 22.05, 32, 44.1,*n>
48) kHz.
• <*n class="ft5">Configurable Word Select period in master mode (separately for I*n>2<*n class="ft5">S input and output).*n>
• <*n class="ft5">Two 8 word FIFO data buffers are provided, one for tran*it and one for receive.*n>
• <*n class="ft5">Generates interrupt requests when buffer levels cross a programmable boundary.*n>
• <*n class="ft5">Two DMA requests, co*olled by programmable buffer levels. These are connected*n>
to the General Pur*e DMA block.
• <*n class="ft5">Co*ols include reset, stop and mute opti* separately for I*n>2<*n class="ft5">S input and I*n>2<*n class="ft5">S output.*n>
以上内容为STM32F303C8T6 STM32F429ZIT6,本产品由深圳市斯瑞特科技有限公司直销供应。
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